Notice

 
Abstract
Decades of technology scaling has brought the threat of soft errors to modern embedded processors. Though several methods have been proposed to protect systems from soft errors, their effectiveness in ensuring error-free computing cannot be guaranteed without accurate and quantitative estimation of system reliability. The metric vulnerability – which defines the likelihood of device failure by accurately evaluating the time it is exposed to soft errors – provides the most effective means to perform early design space explorations to estimate the system reliability in the presence of soft errors. In this talk, I will present gemV – the first accurate and comprehensive vulnerability estimation toolset, which is configurable and extensible to analyse microarchitecture designs. Some of the key features of gemV include (i) all possible microarchitecture components that store bits, even temporarily, are modeled for their vulnerability in the gem5 cycle-accurate simulation platform, (ii) its models have been validated through exhaustive bit-level fault injection experiments, and (iii) the analytical models have incorporated microarchitecture-level masking effects like speculative executions, flushes, etc. In addition to microarchitecture-level evaluation of system reliability, gemV provides a means to perform ISA-level and software-level design space explorations – that explore performance-vulnerability trade-offs of algorithms, compilers, optimization levels, etc.
 
Speaker Biography
Kyoungwoo Lee is an associate professor in the department of computer science and engineering at Yonsei University, Seoul, South Korea. He received B.S. and M.S. degrees in computer science from Yonsei University in 1995 and 1997, respectively, and Ph.D. degree in information and computer science at the University of California at Irvine in 2008. Prior to joining Yonsei, he has experienced industries as software engineers at LG electronics, Inc. in Seoul from 1997 to 2003 and Digital Spectrum Solutions in Irvine, CA from 2009 to 2011. His research is in the area of embedded systems, with a specific focus on cross-layer design and optimization for error-aware and energy-efficient embedded systems. He has published several papers in DAC, DATE, ICCAD, ESWEEK, and ACM Multimedia.